The Future Of SRAM: Enhanced Performance Through Latch Optimization — Key Highlights
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The objective of this research is to develop a 10t sram cell using finfet technology and improve the performance parameters.
The power delay product (pdp) need to be reduced to.
Abstract—this project aims to develop an sram cell that can achieve a high noise margin at low power consumption by using finfets.
The conventional use of cmos technology introduces.
Photographic Archive
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